7.8 Exercises

Assume diodes are silicon unless stated otherwise

Analysis Problems

1. Draw the AC load line for the circuit of Figure 7.8.1. Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency.
   V_CC = 6 V, V_EE = −12 V, R_gen = 50 Ω, R_B = 2.2 kΩ, R_E = 470 Ω, R_L = 75 Ω.

   

2. Recalculate Problem 1 if the load is halved.
3. Determine if the circuit of Figure 7.8.2 has a centered Q point on its AC load line.
   V_CC = −10 V, V_EE = 15 V, R_B = 1 kΩ, R_E = 330 Ω, R_L = 50 Ω.

   

4. Draw the AC load line for the circuit of Figure 7.8.2. Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency.
   V_CC = −8 V, V_EE = 12 V, R_B = 1 kΩ, R_E = 330 Ω, R_L = 32 Ω.
5. Draw the AC load line for the circuit of Figure 7.8.3. Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency.
   V_CC = 15 V, V_EE = −20 V, R_B = 10 kΩ, R_E = 100 Ω, R_L = 16 Ω.

   

6. Determine if the circuit of Figure 7.8.4 has a centered Q point on its AC load line.
   V_CC = 30 V, R₁ = 3.9 kΩ, R₂ = 3.3 kΩ, R_E = 560 Ω, R_L = 50 Ω.

   

7. Draw the AC load line for the circuit of Figure 7.8.4. Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency.
   V_CC = 30 V, R₁ = 2.2 kΩ, R₂ = 2.2 kΩ, R_E = 470 Ω, R_L = 32 Ω.
8. Determine if the circuit of Figure 7.8.5 has a centered Q point on its AC load line.
   V_CC = 15 V, V_EE = −15 V, R_B = 1 kΩ, R_E = 510 Ω, R_SW = 10 Ω, R_C = 270 Ω, R_L = 50 Ω.

   

9. Draw the AC load line for the circuit of Figure 7.8.5. Also determine the compliance, maximum load power, maximum transistor dissipation and efficiency.
   V_CC = 25 V, V_EE = −15 V, R_B = 1 kΩ, R_E = 270 Ω, R_SW = 6.8 Ω, R_C = 330 Ω, R_L = 16 Ω.
10. A power transistor has a P_D(max) of 50 watts at 25°C. It has a derating factor of 0.4 W/C°. Will this transistor be sufficient for a circuit that needs to dissipate 40 watts at 85°C?
11. A power transistor has a P_D(max) of 100 watts at 25°C. It has a derating factor of 0.6 W/C°. Will this transistor be sufficient for a circuit that needs to dissipate 65 watts at 75°C?
12.  Determine the appropriate heat sink rating for a power device rated as follows:
    T_j(max) = 175°C, TO-3 case style, θ_jc = 1.5 C°/W. The device will be dissipating a maximum of 25 W in an ambient temperature of 35°C. Assume that the heat sink will be mounted with heat sink grease and a 0.003 mica insulator.
13. Determine the appropriate heat sink rating for a power device rated as follows:
    T_j(max) = 165°C, TO-220 case style, θ_jc = 3 C°/W. The device will be dissipating a maximum of 15 W in an ambient temperature of 35°C. Assume that the heat sink will be mounted with heat sink grease and a 0.002 mica insulator.

Design Problems

14. Alter the emitter power supply in the circuit described in Problem 1 to achieve a centered Q point.
15. Alter the emitter power supply in the circuit described in Problem 4 to achieve a centered Q point.

Challenge Problems

16. Find a heat sink (make and model number) that will meet the thermal resistance requirement for Problem 12 with no more than 400 feet/minute of forced air.
17. Alter the voltage divider in the circuit described in Problem 6 to achieve a centered Q point.

Computer Simulation Problems

18. Perform a transient analysis for the circuit described in Problem 1 to verify the compliance.
19. Perform a transient analysis for the circuit described in Problem 4 to verify the compliance.
20. Perform a transient analysis for the circuit described in Problem 9 to verify the compliance.