1.5 Summary

The junction field effect transistor is an altogether different device from the bipolar junction transistor. Instead of relying on a forward-biased PN junction to control current, the JFET utilizes a reverse-biased PN junction. Furthermore, the JFET uses voltage control rather than the BJT’s current control. In spite of this, a family of JFET drain curves offers similarity to the BJT’s collector curves, exhibiting three regions: ohmic, constant current and breakdown.

The DC model of a JFET includes a voltage-controlled current source in the drain and a very, very large resistance, 𝑅_𝐺𝑆, from gate to source. This resistance models that of a reverse-biased PN junction. The characteristic equation of the JFET is square-law and is consequently much more gentle in slope than the corresponding equation for a BJT. The maximum current produced by a JFET is 𝐼_𝐷𝑆𝑆 and occurs when 𝑉𝐺_𝑆=0 V. 𝑉_𝐺𝑆 must always be negative to ensure proper operation and all negative values will lead to a drain current less than 𝐼𝐷𝑆𝑆. Once the gate-source becomes negative enough (at 𝑉_{𝐺𝑆(𝑜𝑓𝑓))}, drain current goes to zero.

There are several methods to bias JFETs. Perhaps the most simple method is to apply a fixed potential to the gate while grounding the source. This is called constant voltage bias and is the least stable bias in terms of Q point. Self bias uses a minimum of components and offers modest stability. It is a decent general-purpose bias. The addition of a negative power supply to the source resistor leads to the combination bias topology. This circuit offers improvements in stability over self bias. The most stable bias is the constant current bias. This form relies on a BJT to establish a very stable current.